PhD student Aria Delmar with Advisor A. Stillwell

Delivering power to processors in data centers presents the challenge of completing a high-conversion step-down to a low voltage (1 or 2V) for a given power demand (100-500W). As processor technology trends towards higher power levels with low processor voltage levels, an alternative method for delivering the resulting high current is desired. To move away from the model where high current is connected directly to the package, a system-on-chip or system-in-package (SiP) converter design is considered where the point-of-load converter is integrated into the package. Previous hybrid switched-capacitor power converters have achieved high power density and high-efficiency conversion, but face limitations in chip-level integration due to reliance on magnetics as the output filter. The limitations of in-process magnetic device capabilities prevent these designs from an SiP implementation. Here, we propose a hybrid switched-capacitor converter (SCC) with a current-sourced input stage and no magnetics at the output, as shown in Figure 5. By keeping the magnetics at the input, the converter design is capable of a SiP implementation, with the magnetics connected external to the package at a low-current node. A 48 V to 6 V discrete experimental hardware prototype, shown in Figure 6, is developed as proof-of-concept, with preliminary results demonstrating a peak efficiency of 91.9%. This work is supported by the UIUC ECE Department and the Grainger Foundation.

Figure 1. The proposed current-sourced converter reduces the current flowing into the processor package. Red, blue, and green highlights represent power-dedicated pins.

Figure 2. Discrete PCB prototype of proposed current-sourced converter where all magnetics are located at the input.