Figure 40: Tested multiport startup.

Figure 40: Tested multiport startup.

A power management architecture that uses digital phase control to maximize the advantages of digital control in the lowvoltage power electronics field is proposed. The implemented architecture consists of a 7-bit pipelined ADC, a PI digital controller, a digital phase controller, a digital PWM and a CMOS power device. The implemented architecture design has been submitted to MOSIS for fabrication. The proposed architecture is to stabilize a feedback loop without a current sensor from full-load to no-load conditions by using a digital phase controller. The architecture also has multiinput multi-output functionality and sets not only the sequence of on-and-off of the dcdc converters but also the device switching command signal. The converter is fabricated with AMIS 0.5-ยตm CMOS technology. The tested multiport startup and full to no-load transition responses are shown in Figures 40 and 41.

Figure 41: Full to no-load transition response.

Figure 41: Full to no-load transition response.